1. Field of the Invention
The present invention relates to a synthesis method of a Sigma-Delta modulator, and in particular to a synthesis method of a Sigma-Delta modulator capable of relaxing circuit specifications and reducing power consumption.
2. The Prior Arts
Analog-to-Digital Converter (ADC) plays a fairly important role in various electronic products. In recent years, Sigma-Delta modulator has been utilized extensively in ADC to realized functions of Analog-to-Digital Conversion, so it can be found in MP3/MP4 or hearing aid, or in handset of GSM system. In recent years, energy conservation has become an important issue, and that leads to the consequence that, in addition to stressing high efficiency and low cost, the Electronic Industry also puts emphasis on reducing power consumption. Therefore, how to design products efficiently while meeting the desired specification is a critical issue.
In the prior art, in designing a Sigma-Delta modulator, firstly, a set of frame work, oversampling ratio, order number, quantizer bit number nearing the target specification are synthesized through a system. Then, a series of circuit non-ideal effect analyses, such as analyses on thermal noise, limited open-loop gain, non-linearity characteristics, limited bandwidth, and slew rate of an Operational Amplifier are performed, to obtain the minimum circuit specification of a Sigma-Delta modulator meeting the system requirements. However, through this approach of design, only specifications of Sigma-Delta modulator can be obtained, yet the objective of reducing power consumption can not be achieved.
Therefore, presently, the method of synthesizing a Sigma-Delta Modulator is not quite satisfactory, and it has much room for further improvements.